Hi,
According to the limitation of the core clock frequency range,
We would like to set SSM2604 as follows and know the value of SR[3:0] and BCLK frequency.
MCLK:25.6 MHz
Core clock：12.8 MHz (CLKDIV2 = 1) (768 fs)
RECLRC/ PBLRC：16.666… kHz (fs)
Normal mode
16-bit word
Slave mode
We think SR[3:0]=[0101] and BCLK=Core clock/4(3.2 MHz).
Are those right?
Best regards,
Nikkee