Eval ADV7842/ADV7511 Board: How to write/read to Registers using Tera...
Eval ADV7842/ADV7511 Board: How to write/read to Registers using Tera Term/Matlab? Using Matlab, I have to write/read registers in ADV7842, for example: IP 40 01 to switch 60Hz/50Hz (V FREQ)IP...
View ArticleRe: Flashing 21489 EZ Kit Without VDSP++/Emulator
For your situation I would recommend that you add a custom boot loader that you put on the board for the ARM developer.On the EZBRD, you could the put the boot loader in parallel FLASH and the run time...
View ArticleAD9102 number of Clocks needed after /Trigger goes high?
I have an application where the Clocks to the AD9102 are provided by a Gated PLL that has a variable clock rate output. The intended result being "bursts" of pulses at a nominal repetition rate. The...
View ArticleRe: exporting data from ADAS3022
The software is National Instruments LabVIEW 8.5, version 8.5.1f5. Upon right clicking, there is an option to 'export a simplified image,' but I would like the actual voltage data used to create the...
View ArticleRe: AD9102 number of Clocks needed after /Trigger goes high?
Hi - In your application you need to provide enough clock cycles to terminate each pattern period. You set the pattern period using Pattern_Period_Base amd Pattern_Period. Does this help?- Larry
View ArticleRe: AD9102 number of Clocks needed after /Trigger goes high?
Larry,So I could potentially set the clocks and /Trigger to stop simultaneously? And not provide the extra clocks shown in Figure 42? (that would be ideal...) Looking for if there is a minimum since at...
View ArticleRe: Axi_dmac optimized issue?
Hi all, A college found the issue, big shocker its with Vivado... axi_fifo #( .C_DATA_WIDTH(3), .C_ADDRESS_WIDTH(0), .C_CLKS_ASYNC(C_CLKS_ASYNC_DEST_REQ)) i_dest_response_fifo (...
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Re: adv7604 custom res 1280 x 960
Hi, Based on the timing provided, enter the following to the appropriate registers in the ADV7604 as outlined in the hardware manual. Pixel clock = 105.948 MHz if VFreq = 60 Hz. If Vfreq 59.2 Hz, pixel...
View ArticleRe: RF synchronization with AD-FMCOMMS5-EBZ
AD-FMCOMMS5-EBZ is an evaluation platform that synchronizes 2 devices. You can find more information at this link: AD-FMCOMMS5-EBZ | Analog Devices
View ArticleRe: AD9631 DAC Output Range?
AD9361 individual block input and output signal ranges are not specified. Datasheet and device documentation specify DAC input digital range (12 bit) and Tx output power (approximately +8dBm wrt 50ohms...
View ArticleRe: AD9631 DAC Output Range?
The documentation can be downloaded from this location. AD9361 AND AD9364 INTEGRATED RF AGILE TRANSCEIVER DESIGN RESOURCES | Analog Devices
View ArticleRe: About AD9361 RBIAS(pin L4)
I would suggest checking the supply level right at the chip pins. Please make sure the supplies are within datasheet tolerance.
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Re: Readback gain reduction of Dynamic Processor with ADAU1452
Hello Bernd and Miguel, SteveL came up with an ingenious way to produce a true exponential decay for a level meter. By applying feedback to a External Decay Peak Detector, he sets up the...
View ArticleRe: AD-FMCOMMS5 with KC705
There are no problems. The AD9361 part of the no-OS is independent of any carrier or FPGA (it is all through the SPI). At present, we don't have a reference design on KC705. If you have successfully...
View ArticleRe: Sine wave in No-os driver FMcomms1-ebz
Yes-- by programming the corresponding registers. Go through the user doc. and try to understand the design and the user controls.
View ArticleRe: Using no OS driver with custom h/w in verilog
I suggest you try a simple (such as the "hello word") EDK tutorial using Vivado (IPI) and SDK first.After the basic concepts are clear, you can take on FMCOMMS1.
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Re: Precision of the state-variable filters
Looks like I answered my own question. It's well known that fixed-point IIR filters have the most difficulty when set for a low frequency (f << fs), and high Q. Thus I made a test of 2nd...
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Communication with camera via PPI - different VSYNC signalization
Hi I am working with BF526 EZLITE. I am trying to capture image from OV7670 using PPI in 2 external frame syncs mode.All the time I have 2 faults in PPI status register - Horizontal Tracking Underflow...
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AD5331 GAIN SLOPE
Hi all I have a question about Fig.6 of ADL5331 datasheet.The value of slope is nearly 0mV/dB over 100MHz in Fig.6. But I can see 39.5mV/dB as the value of Gain control slope at 400MHz in Table 1.Is...
View ArticleRe: ADV7480 without audio output
Thanks for your reply Dave! This problem is solved.There are some problem in the adv7511.We just read 128byte from adv7480,this block is right.Then we set the 0xC4,then we read the last 128byte.This...
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