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Could I setup a glade platform in Ubuntu 12.04 over the Zedboard and AD9361...

Dear all, When I know how to manipulate the register 0x418 in debug tab of IIO Oscilloscope software to loopback the RX-input signal directly into the TX-out, I have an idea on design my own...

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Re: AD9880 questions

Chris,   We have a customer that is a HDCP License holder that would like to install the keys into the EEPROM that we installed on our board. We have a program that we can provide to the customer to...

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Re: HMC799 Overdrive Recovery Time

Hi Tony, Thanks for the information provided. The device saturates for an input current of about 50uA indeed. In the limiting case, the linearity is not preserved and input impedance changes. This is...

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Can the ZC706 board support dual link mode on the ad9144 (DAQ2 board)?

The ZC706 has 4 GTX lines (lanes) going across the FMC connector. This means on the DAQ2 board two lanes are used for ad9680 and two lanes for the ad9144. Is it possible to use the dual link mode on...

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Can I program a RLS filter using SigmaDsp on a ADAU1401A (SigmaDSP 28-/56-Bit...

Hello all,  I want to implement a RLS filter using the program SigmaDSP on a ADAU1401A. Is this possible? I don't find the right way to do it.  Thank you in advance

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Re: Can I program a RLS filter using SigmaDsp on a ADAU1401A (SigmaDSP...

Could you please develop your answer? I don't get it how to apply it on SigmaStudio!

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Which 2 lanes are used for the ad9144 on the ZC706/DAQ2?

In the driver software (NON OS) all lanes are just enabled. Which of the two lanes are used on the ad9144, when using the ZC706/DAQ2 constellation?

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Re: ADG884 Threshold voltage on IN1/IN2

PDF file attached with extract from schematic.

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ADE7878A: isolation requirements

Hi everybody,I have to draw the schematic of a three phase e-meter which mounts ADE7878A. The e-meter measures the three voltages (3 x 230Vrms) by means of three resistive dividers (direct measure of...

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Re: Simulink ad9361 transmitting and receiving

Hi David, The transmitter gain can be changed by modifying the Tx1 and Tx2 Attenuation fields from the FMCOMMS2/3/4 tab of the IIO scope. To expose the Tx gains in the Simulink model just add the...

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Re: When ad9361_sim.six is configed as recv mode only. How to display...

Hi Lee, The sine wave source blocks are the ones that specify the sample time of the model, all the other blocks in the model just inherit the sample time. Since these blocks were removed it's...

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Re: help choosing and configuring clock source for AD9102

Ok, thanks, Larry!

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Re: Could I setup a glade platform in Ubuntu 12.04 over the Zedboard and...

Dear Robin, I was told that using Glade is a good way to develop UI in C programming upon Ubuntu system.  Moreover, I would like to create an app with a simple UI.Thus I would like to know whether I...

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Re: What is the easiest way to get I2S Stereo from HDMI?

The other way would be to use an integrated solution like ADV7611.Can anyone tell me if the extracted stereo output will still be encrypted? Thanks!!

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Re: When ad9361_sim.six is configed as recv mode only. How to display...

Hi Andrei,    Thank you for your reply!   Yes, as you said, it can display now ! However, it seems that the displaied wave is auto moved from left side to right side with the packets recving. How to...

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ADR01ARZ 10V reference

My Customer has tested the ADR01ARZ 10V reference under the influence of a High Electromagnetic Pulse (EMP). The device functions well until protective action can be initiated.The qustions are:1) Is...

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Re: ADV7842-7511P:HDMI 1080P

Full documentation and scripts for the eval. board can be found here.https://ez.analog.com/docs/DOC-1681The scripts are in AVES3_Folder_EVAL-ADV7842-7511.zip The device hardware and software manuals...

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Re: What is the easiest way to get I2S Stereo from HDMI?

Hello, The audio is just passed through from the source as data-- so it will be encrypted if the stream is encrypted.  The only way you get stereo only is if the source is sending stereo. None of our...

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Re: Fast rising pulse and increment pulse width

This is too fast for a PLL. 150 ps requires a 6.66 GHz signal. The next pulse is 6.25 GHz 160 ps later. This is much faster than a PLL can respond. A PLL settling time is in the order of microseconds.

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Re: HMC-C200 question

The HMC-C200 was designed for PLL applications.  It was optimized for phase noise.  In the effort to optimize phase noise its bandwidth for electrical tuning or modulation was limited to approximately...

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