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Re: Data of ADIS16488 change with tempetature

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This is exactly the problem I had. I'm sure there was no outside heat source around the IMU. To describe the problem more clearly, I upload a  data file of  ADIS16375, which was tested on the same circuit board with the same program. The phenomenon that the readings change with temperature is not as obvious as ADIS16488.  


Re: AD5933 - Question about Real & Imaginary data

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I am measuring the voltage drop using oscilloscope but I think it is not accurate.

The results are different between that with oscilloscope and that without oscilloscope.

 

<1k, without oscilloscope>
Frequency: 10.00 kHz; Impedance: 1.00 kOhm; Re: -203, Img: 6691,
Frequency: 20.00 kHz; Impedance: 1.00 kOhm; Re: -1973, Img: 6402,
Frequency: 30.00 kHz; Impedance: 1.00 kOhm; Re: -3476, Img: 5637,
Frequency: 40.00 kHz; Impedance: 1.00 kOhm; Re: -4807, Img: 4250,
Frequency: 50.00 kHz; Impedance: 1.00 kOhm; Re: -5620, Img: 2343,
Frequency: 60.00 kHz; Impedance: 1.00 kOhm; Re: -5634, Img: 275,
Frequency: 70.00 kHz; Impedance: 1.00 kOhm; Re: -4911, Img: -1439,
Frequency: 80.00 kHz; Impedance: 1.00 kOhm; Re: -3848, Img: -2470,
Frequency: 90.00 kHz; Impedance: 1.00 kOhm; Re: -2771, Img: -2953,
Frequency: 100.00 kHz; Impedance: 1.00 kOhm; Re: -1871, Img: -3076,

 

 

<1k, with oscilloscope>
Frequency: 10.00 kHz; Impedance: 285.88 kOhm; Re: 22, Img: -8,
Frequency: 20.00 kHz; Impedance: 1148.82 kOhm; Re: 3, Img: 5,
Frequency: 30.00 kHz; Impedance: 986.73 kOhm; Re: 3, Img: 6,
Frequency: 40.00 kHz; Impedance: 796.82 kOhm; Re: 4, Img: 7,
Frequency: 50.00 kHz; Impedance: 1131.22 kOhm; Re: -2, Img: 5,
Frequency: 60.00 kHz; Impedance: 1261.54 kOhm; Re: 4, Img: 2,
Frequency: 70.00 kHz; Impedance: 1280.97 kOhm; Re: 0, Img: 4,
Frequency: 80.00 kHz; Impedance: 3232.24 kOhm; Re: 1, Img: -1,
Frequency: 90.00 kHz; Impedance: 578.48 kOhm; Re: -7, Img: 0,
Frequency: 100.00 kHz; Impedance: 719.94 kOhm; Re: 0, Img: 5,

 

I think it is caused by the impedance of oscilloscope. Is it right? If yes, then how can I check the voltage drop accurately?

Re: AD5933 - Question about Real & Imaginary data

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Not a good way, indeed. Let's check Vref with respect to the ground: it should be 2.5V. Same 2.5V should be present at the outputs (pin 6) of U1, U2 and U4.

Let's also double-check: when you put 1k instead of the "body", you are connecting it between pins 2 and 6 of U2 and connect pins 3 and 4 of U4 to the resistor leads, correct?

Re: Active Cell balancing using LTC3300

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Hi, we have decided to go with Ltc3300. Since we can not simulate we decide to start with a prototype using LTC3300-1 and LTC6803-1

Is typical application in datasheet good for a prototype (we hope to use 12s2p for prototype. Can I use those component values in datasheet for 2A peak balancing current.

We think LTC3300-1 is better for this prototype (12s2p) but still unsure which Ic to use LTC3300-1 or LTC3300-2

Thanks in advance, 

temperature sensor in ADuC7126

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I set TSCON=0x01、ADCCP=10000 and got ADCDAT[27:16]=0x79E

According to the tempearture calculation in datasheet, the temperature is around -44degree celcius.

what is wrong with my temperature measurement  and calculation?

Re: AD5933 - Question about Real & Imaginary data

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Actually Vref is not 2.5V but 2.25V. It would be right because the Vdd by arduino is 4.5V.

 

The output of U1 is also 2.25V, but not for the others.

That of U2 is 3.78V and that of U4 is 1.03V.

 

And I connected the 1k Resistor as a body with U2(pin2 and pin 6) and U4(pin2 and pin3).

Re: EVAL-ADRF6780 RF output

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Hi Assaf,

 

I and teh customer understand we can change the side band by SPI setting of ADRF6780 and so on. But the customer would like to konw the specification of them. Can you get like that information?

 

Thanks & Regards,

Akira

Does the Y/C output of ADV7393 be connected as differential o/p?

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Hi All,

Greetings!!

I am using the video encoder IC ADV7393 to encode 16bit RGB to Y/C output. But as per the requirement, the output should be differential Y_p/n and C_p/n output. Can the single ended outputs be connected directly to differential output pins of external connector or a single ended to differential converter is required? Or can you suggest a different part that meets the requirement (Analog, 1VP-P terminated condition, differential, 75Ohm).


A block diagram is attached along with.

Thanks and regards,

Rajneesh J


Re: AD5933 - Question about Real & Imaginary data

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Yes, 2.25 is where it should be. What if you temporarily remove Rcurrent and R7 from the schematic and measure voltages at the outputs of U2 and U4 and Vin of the AD5933? All should be the same 2.25V.

Re: AD5933 - Question about Real & Imaginary data

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I removed them and checked.

The output of U2 is 3.69V, and both of the output of U4 and Vin of AD5933 are 1.06V.

 

If there is no problem on circuit, are those should be 2.25V as you said?

Re: Can't ADV7625 receive 1366x768 at Transceiver mode (non mux mode) ?

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Hi Poornima,

 

Thank you for your answr. But accordimg to the customers, cp_x_vid_std controls seems to affect not free run signal. Because the customer set cp_a_vid_std[7] from 0x8C to 0x85 for HDMI Rx input signal(1366 x 768). Then it can recive 1366×768 well.

 

Best regards,

Akira

Re: AD5933 - Question about Real & Imaginary data

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Yes, all should be at 2.25V. The AD5933 with only Rfb connected should certainly show half of Vdd at the Vin pin - are you sure R7 is removed? Let's double check that ground and 4.5V power is connected to all chips, I would try checking whether the 4.5V is present right at the chip Vdd pins. Second thing to go is to disconnect U4 from the "Body" resistor and see if U2 output comes to 2.25V.

Re: how to convert noisegate decay(ms) ?

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Hi,

The decay parameter is the release time (ms) which controls the rate at which the signal will subside after the input signal level has dropped below the threshold. Larger values result in longer decays. The following range shall be available for configuring Decay time 5 to 10000ms with a resolution of 1.0ms

 

Thanks,

Sakthivel.P

Re: AD628 common mode offset on the output

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Hi,

 

First of all, thank you for your answer.

 

In my previous message, when i speak about common mode offset I'm not speaking about global offset wich is bigger but about the offset difference between 0V and 3V of common mode voltage.

 

Yesterday i made an other test with 10V of common mode voltage -> that leads to a 48mV common mode offset on the output.

 

About the application and specs:

"

I have to needs :

- measure a voltage on a 300R/1% resistor with a current between 0 and 100uA (accuracy 2%, common mode 5V)

- measure a battery voltage : 0-700mV differential (accuracy 2%, common mode 1V)

"

 

Best regards,

Robin

Re: Getting start with AD9361

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Hello DragosB,

 

I have started freshly and from the hdl master I have added all verilog files to my project and created  system_wrapper.v    project and created system_wrapper.hdf. Later I followed procedure as mentioned in AD9361 No-OS Software [Analog Devices Wiki] . Unlike zync soc (for microbllaze there is some different steps i found when i have given mb (microblaze name in project came by default by hdf file)). In this method I have loaded hdf file and bit file, I have not loaded image file as i want to run no OS software. Then my bitfile successfully loaded message i saw in SDK console as below. I have not found any XMD console.

 

15:57:12 INFO : Connected to target on host '127.0.0.1' and port '3121'.
15:57:12 INFO : Jtag cable 'Digilent JTAG-SMT1 210203A3D0E0A' is selected.
15:57:12 INFO : 'jtag frequency' command is executed.
15:57:12 INFO : 'targets -set -filter {jtag_cable_name =~ "Digilent JTAG-SMT1 210203A3D0E0A" && level==0} -index 0' command is executed.
15:57:18 INFO : FPGA configured successfully with bitstream "G:/XMD2018/demo_16/system_top.bit"
15:57:18 INFO : 'configparams mdm-detect-bscan-mask 2' command is executed.
15:57:18 INFO : Context for processor 'sys_mb' is selected.
15:57:19 INFO : System reset is completed.
15:57:22 INFO : 'after 3000' command is executed.
15:57:22 INFO : ----------------XSDB Script----------------
connect -url tcp:127.0.0.1:3121
targets -set -filter {jtag_cable_name =~ "Digilent JTAG-SMT1 210203A3D0E0A" && level==0} -index 0
fpga -file G:/XMD2018/demo_16/system_top.bit
configparams mdm-detect-bscan-mask 2
targets -set -nocase -filter {name =~ "microblaze*#0" && bscan=="USER2" && jtag_cable_name =~ "Digilent JTAG-SMT1 210203A3D0E0A"} -index 0
rst -system
after 3000
----------------End of Script----------------

15:57:22 INFO : Disconnected from the channel tcfchan#3.

 

From the above message I found that system_top.bit is loaded successfully and system reset is happend. 

After 15:57:22 INFO i didnt understand anything. After end of script Disconnected channel refers to what???

As usual i tried to saw signal on signal analyzer atleast LO i am not able to do it.. 

If possible can you test from your side and let me know... Will be hardware problem???


LTC6957-3 voltage level drop in clock input

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We are using the recommended circuit in typical application of the datasheet in page 38 for LTC6957. the 10MHz REF IN clock from source is at 3.3V level without any load. The moment we connect this 10MHz clock to our circuit the voltage is dropping to less than 1V even before the first capacitor (C649). What might be the issue? Attached is the schematics for reference

ADV728x : Free-Run output timing

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Hi

 

I've reffered below thread.

https://ez.analog.com/message/299195-what-happends-when-a-video-source-is-disconnected-from-the-adv7180-adv7182-and-adv728x

 

Could you advise if my understanding on Free-Run output timing is correct? 

Case 1) Start from Free-Run mode

             Video decoder output Free-Run signal during coarst mode and try to lock incomming video signal.

             Once it got locked(IN_LOCK=Hi), Video decoder will get out from Free-Run mode and switch to incomming video signal. The lock time depends on programmed mode, approx 1s(standard mode) and 250ms(fast switch mode).

Case 2) Video source connect -> disconnect(or lost)

             Video decoder get into coast but continue to output video signal(noise) for a period of time, then output Free-Run. The lost lock time depends on programmed mode, approx 1s(standard mode) and 250ms(fast switch mode).             

 

Regards,

Tomoto

The DC problem of the AD9361

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Hello!

The DC problem of the AD9361. (AES-PZSDRCC-FMC-G)
When I configure the AD9361 RX data rate to 2.048Mbps, no signal is input. I will always receive a DC signal, how does this DC signal be eliminated?
I hope to configure the AD9361 Rx bandwidth to 200K, but I find that the passband is not flat when the analog bandwidth is small. Is there any good solution?

 

Re: LTC2859/61 Short-circuit current & Thermal shutdown

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Hi Yuya,

 

You are right, this part does not have such pin indicating thermal shutdown alert.

 

Regards,

Neil

AD7124 different measures with two power modes

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Hi,

 

I'm using the AD714-4 to measure the temperature using a pt1000.

 

My problem is that with the same configuration, I get two different measures in low or full power mode:

  • Low power mode: 
    • count : 12301575
    • pt1000 resistor : 1096.18 Ohm
    • Temperature : 24.04 °C
  • Full power mode: 
    • count : 12416560
    • pt1000 resistor : 1128.39 Ohm
    • Temperature : 32.09 °C

 

I don't think that this is due to the fact that the full power is more precise because the difference between the two measures is too important. (the correct measure is the low power one)

Does someone have an idea why the ad7124 does this?

 

My registers are in default state except for:

  • The input pins.
  • The reference is external ( 250 µA output from the ADC in a 4700 Ohm resistor = 1.175 V).
  • Gain = 2.
  • Bipolar mode.
  • No internal calibration for gain or offset.
  • Data rate : FS = 2047.

 

Best regards,

 

Arnaud

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