What's the fab process of ADAR1000 ? Is it silicon germanium (SiGe) or other ?
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About fab process of ADAR1000
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Re: Is the analog's hdl framework fine for my application?
Hello,
We don't provide explicit support for AD9234 in HDL, but you can probably use one of our other ADCs as a starting point for the port. We have support for the part in the Linux drivers.
The ADI JESD204 IP is free to use if the project is open (as specified in GPL 2), yes. The Xilinx JESD204 IP is usually licensed and you need to pay for it, but you can check with them for a more accurate answer.
Depending on the platform and the bandwidth requirement, we sometimes use PL DDR to capture data. You can check the DAQ2/ZC706 project to see how it's done. Basically, we capture the data from the ADC and stream it into PL DDR. After that, we use a DMA to transfer it to the PS DDR where is further processed or from where is transmitted to a PC through Ethernet.
In our repository, we don't support ADS7V2 board, as it's used for evaluation and not prototyping. Do you have access to a ZC706/ZCU102 board ? We have better support for these. Depending on the system, you may not need to use PL DDR.
My recommendation would be to use DAQ2 with ZC706. Matlab won't run on the PS, but you can transfer the data to the PC and process it there using Matlab. As it is, it uses PL DDR to capture ADC data, but if you only want to use a single channel, you may be able to capture the data directly to the PS memory.
For FMCOMMS2 we provide an example on how to stream data directly to MATLAB, you can probably do something similar for you design:
IIO System Object [Analog Devices Wiki]
Regards,
Adrian
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Re: Getting start with AD9361
Mahesh,
Sorry for the inconvenience. If there is no activity for a long time, we are usually assuming that the question was answered. That doesn't mean that you can't come back and let us know that this is not true.
From I understood, you have only programed the FPGA with the bitstream, but you didn't run the baremetal code. I guess that you missed the last steps from the instructions. The only difference compared to Zynq is that on MicroBlaze, the default HEAP size should be increased - otherwise, all the steps should be common.
Thanks,
Dragos
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Re: Multi-core (Shared memory)
How to write through, but not write back?
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Re: ADV7280 unused Analog input
Hi,
Please refer below link,
What to do with unused analog video input pins (Ain) on video decoders ?
I hope this would be more helpful.
Thanks,
Poornima
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Re: Filter between ALD5202 and AD9643
Hi,
I am not sure what product you are referring to when you mention the AD9367. Please confirm what product you are connecting to the ADL5202. With that being said, when connecting a different ADC instead of the AD9643 you will need to account for the input impedance of that device. The circuit shown in CN0242 is designed for the input impedance of the AD9643 and using a different ADC will most likely shift the frequency response as you are seeing since the input impedance is different. The filter circuit is designed to account for the output impedance of the ADL5202 at the filter input and the input impedance of the AD9643 at the filter output. Changing these impedances will affect the behavior of the filter.
Regards,
Jonathan
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Re: Does the Y/C output of ADV7393 be connected as differential o/p?
Hi,
I beleive,ADV7393 part can connect as differential output.
And also please refer below link for other encoders chip to meet your requirement.
Which ADV739X or ADV734X video encoder should I choose?
I hope this will be more helpful for you.
Thanks,
Poornima
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Re: Setting a different observation RX Frequency to TX Frequency on AD9371
Hi Vinod,
Thanks for your reply. Please see my comments below:
Regards
Richard
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Re: FreeRTOS for ADSP-BF70x - getting started with drivers?
Hi Dave,
thanks for the quick reply.
I figured out that no further interaction is needed by the application coder. The adi_spi_ReadWrite should automatically return, no need to register and give a semaphore manually. This seems to be handled automatically, probably by the OSAL. The application has been blocked because of an infinite loop in the task stack overflow detection hook function, so this could be fixed by increasing the task's stack size.
The application seemed to be stuck at the read/write function, but actually was not. Thanks for the support.
Cheers
Matthias
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Re: Setting a different observation RX Frequency to TX Frequency on AD9371
Reply to email didn't work properly: Adding my reply here through the website:
From UG-992 : No user input is required to initiate a tracking calibration. Receive calibrations are only run when the receive chains are enabled; likewise, transmit tracking calibrations are only run when the transmit chains are enabled. Transmit tracking calibrations also require the user to assign the ORx path to the ARM for calibrations for a specified proportion of time, to allow the Tx data to be observed.
Yes we are doing this
User need to assign ORX path for tracking calibrations during TX period for a minimum duration of 800Usec and chunks of that.
Compliant – tracking calibration get approx. 100ms
If you are seeing glitches while switching , can you trying enabling Tx prior or disabling ORX early and see if that impacts.
TX is enabled all the time. I tried putting some delays in my sequence which made no difference:
While transmitting
Enable TX LO Leakage tracking
10 ms Delay
Switch Obs path to INTERNALCALS
wait approx 100 ms
Disable TX LO Leakage tracking
10 ms Delay
Switch Obs path to ORX1_SN_LO
capture obs data (approx 1 ms)
while end
I believe the real cause of the glitches is the continual enabling and disabling of the TX LO leakage Tracking algorithm. When the TX LO leakage algorithm is disabled we can switch the obs path without any TX glitches. I suspect when the algorithm is enabled it either sends a calibration signal or briefly interrupts the TX. Indeed I can replicate the glitches by repeatedly enabling and disabling the TX LO leakage Tracking algorithm in your IIO Oscilloscope application. Ideally we would keep the algorithm enabled all the time, but as discussed previously that stops the correct RX/SN LO frequency being used.
Other thing to check will be power supply if you are using custom board. You can check the power lines to see if there are any voltage drops when you switch Orx or Tx/Rx path.
We are using your ADRV9371 board.
I don't really understand from your documentation why if I switch the obs path to ORX1_SN_LO programmatically the tracking algorithms (or the TX LO leakage algorithm in particular) isn't gated and the correct RX/SN LO frequency isn't being used for the observation path.
Will check and get back on above.
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Re: ADV728x : Free-Run output timing
Hi,
Yes your understanding is correct.
The free run output not depend on the noise but its really depend on the lock(sometimes due to video flickering it will go to the lock lost state).
If the video (video is not stable)is Lost Lock then it will go to free run mode and output is blue screen.
Free run possibilities:
1.video source is not connected
2.sometimes video not locked/ video not stable or noisy video,it may wait for 1s or 250ms(fastswitch) approximately to lock,but if that lock is lost, it will go to the free run mode(output is disconnected).
Thanks,
Poornima
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Re: AD9951 EVAL BOARD OUTPUT VOLTAGE SWING
1. Yes, -7dBm equates to ~140mVpk (as measured by an instrument with a 50-ohm input impedance).
2. No, you cannot get 1.8Vpk out of the DAC.
Regarding item 2, the data sheet specifies +/-0.5 (centered on VDD) as the DAC's "Voltage Compliance Range". Hence, 500mVpk is the most you can expect out of the DAC. To be clear, the DAC outputs a current (not a voltage). The DAC output current flowing through the external load is what converts the current to a voltage.
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Re: HMC213AMS8E - is there a correlation between the 4 digit lot code on this device (mine has 7753) and the date code?
I normally track all of our parts by date code but the paperwork cannot be found for this one. I was hoping to correlate the 7753 lot number to its corresponding date code. I would be helpful to know the decoder.
Thank you.
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Re: How to set LTC5594 ADRF6520 AD9684 Common mode voltages ?
Greetings serdarsarac,
I you do not mind, I will say a few words for shsiao, who is out of office for a while.
LTC5594 has internal DVGAs, plus internal output amplifiers designed to directly drive most common high-speed ADCs. For most applications, another driver IC is unnecessary. LTC5594 output Vcm range is specified as 0.5 to 2.0 V. Best performance is at Vcm= 0.5 to 0.9V, as shown in datasheet Figure 12. AD9684 requires Vcm= 2.05V +/- 100mV. The LTC5594 can do this, but there will be some degradation of OIP3 performance as shown in Figure 12.
In general, the Vcm imputs are measured in kOhms, so adequate current drive capability is usually not a problem.
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Re: Suddenly CCES v2.8.0/ICE-1000 v1.2 detect a core hang on SHARC ADSP-21479?
This morning, I powered-up my custom board with the ICE-1000 attached, plugged the ICE-1000 USB cable into my laptop PC's docking station USB port (which turned its LED1 green), launched my CCES workspace, clicked on the debug icon, and got this WmSonar "Could not obtain firmware version. Please shutdown CrossCore Embedded Studio, disconnect and reconnect USB on the emulator, and try again." pop-up window while LED1 was still green:
and my CCES Console window said:
[TpsdkServer] Failed to connect to processor.
Error: 0x80048017
Error Description: Initialization: Firmware version error
I did exactly that: closed CCES, disconnected the USB cable from my laptop docking station USB port (ICE-1000 LED1 turned off), waited 5 secs, plugged it back in to the docking station USB port (LED1 turned green), launched CCES with the same workspace I've been using for weeks), clicked Debug, and I once again got the exact same error.
So, I shutdown CCES, disconnected USB cable from ICE-1000, powered-off my custom board, swapped ICE-1000 for another one that worked yesterday, powered-on my board, reconnected USB cable (LED1 went green), launched same CCES workspace, clicked Debug, and I didn't get any error this time (LED1 went magenta), but when I clicked the Play icon, my breakpoint didn't get hit. I clicked Pause, and got "Core Hang Detected on SHARC-21479" pop-up that I attached when I opened this case (at the same PC:127c09 which is past my . I clicked Clear in that pop-up and saw a bunch of "Unable to retrieve disassembly data from backend." at address 0 in the Disassembly window, the Debug window showed the Debug\app.dxe was Suspended:Breakpoint at 0, and ICE-1000 LED1 had turned off.
When I closed CCES, the ICE-1000 LED1 turned green again, so I launched CCES with same workspace again, and immediately got the "Core Hang Detected on SHARC-21479" pop-up window error (LED1 was magenta). I clicked Reset and LED1 started flashing magenta (~1 Hz).
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Re: Sine Wave Generator with Adjustable Frequency port for BF706-EZMINI
Check out my in-debt review of this book on Amazon
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Re: HMC213AMS8E - is there a correlation between the 4 digit lot code on this device (mine has 7753) and the date code?
Understood. I'll find the date code + possibly the decoder, and email it to you. This one might take a little longer as the part is now obselete.
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ADRV9008-1 RF_EXT LO export divider
Hello.
It is my understanding that the RF_EXT_LO_I/O pins can be used to export a divided version of the VCO for debug purposes.
Does the ADRV9008-1 have seperate dividers for the the RF_EXT_LO export and the internal LO used by the receive path?
For instance, lets say that the LO frequency is 2GHz. The ADRV9008-1 synthesiser will be operating at 8GHz and a divide by 4 will be in place to generate 2GHz. Is it possible for me to set the divider on the RF_EXT_LO export to be 2, such that I can export 4GHz?
Graphically, is this configuration possible?
SYNTH(8GHz) ------|DIV 4|---------> 2GHz LO used by the ADRV9008-1 receive path internally
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|------------|DIV 2|---------> 4GHz exported out of RF_EXT_LO pins
Thanks for the help!
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Re: I am try to get a thermocouple by AD7124-4 application again.
Hi Hahmin,
As mentioned previously, there is no direct ADICUP360 code for the CN0376. The CN0376 uses the AD7124 for the ADC. We do have C code for the ADICUP360 for another thermocouple project using the AD7124. That can be found here. (EVAL-ADICUP360/projects/ADuCM360_demo_cn0391 at master · analogdevicesinc/EVAL-ADICUP360 · GitHub )
It won't be exactly the same as the CN0376, but it should show you how to configure things.
Brandon
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Re: ADUM5230
Divakm:
Sorry to hear your question about the ADum5230 was not answered since January 2018, it could be that it was placed in the ADIsimPE forum, generally it would be in the Interface and Isolation. The circuit you attached is very simple, a more detailed application circuit would be Figure 25 of the datasheet, which has the bypass capacitors (values usually 1 to 10uF) and output buffer transistors used to drive the MOSFETs connected to +HV and -HV (in your case +HV = +90V and -HV = 0V).
Are you just turning on the +90V to stay on constantly by asserting a High level on VIA and you don't need to pull the output to 0V? If so you may not need the output buffer transistors, and just the MOSFET that connects to the +HV, and the MOSFET on the -HV may not be needed.
Regards,
Brian
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